| 作者 |
| Victor P. Nelson （美）Victor P. Nelson（维克多 ？ P. 纳尔逊） |
| 丛书名 |
| 国外电子与通信教材系列 |
| 出版社 |
| 电子工业出版社 |
| ISBN |
| 9787121398704 |
| 简要 |
| 简介 |
| 内容简介 本书以介绍数字设计的基础知识以及丰富案例为主要特色，并在第一版的基础上进行了全面的修订与更新，更加突出了数字设计相关技术的应用。本书内容包括：计算机与数字系统，数制系统，逻辑电路与布尔代数，组合逻辑电路分析与设计，时序逻辑电路简介，同步时序逻辑电路分析与设计，异步时序逻辑电路分析与设计，可编程逻辑器件，数字系统设计。本书对基本概念和理论的讲解具有一定的广度与深度，同时添加了非常实用的设计方法。 |
| 目录 |
| 0 Computers and Digital Systems 1 Learning Objectives 1 0.1 A Brief History of Computing 1 0.1.1 Beginnings: Mechanical Computers 2 0.1.2 Early Electronic Computers 2 0.1.3 The First Four Generations of Computers 2 0.1.4 The Fifth Generation and Beyond 4 0.2 Digital Systems 4 0.2.1 Digital versus Analog Systems 5 0.2.2 Digital System Levels of Abstraction 5 0.3 Electronic Technologies 8 0.3.1 Moore’s “Law” 9 0.3.2 Fixed versus Programmable Logic 10 0.3.3 Microcontrollers 10 0.3.4 Design Evolution 10 0.4 Applications of Digital Systems 12 0.4.1 General-Purpose Digital Computers 12 0.4.2 Controllers 17 0.4.3 Internet of Things (IoT) 18 0.4.4 Interfacing 18 0.5 Summary and Review Questions 20 0.6 Collaboration Activities 20 References 21 1 Number Systems and Digital Codes 22 Learning Objectives 22 1.1 Number Systems 22 1.1.1 Positional and Polynomial Notations 23 1.1.2 Commonly Used Number Systems 23 1.2 Arithmetic 24 1.2.1 Binary Arithmetic 24 1.2.2 Hexadecimal Arithmetic 27 1.3 Base Conversions 29 1.3.1 Conversion Methods and Algorithms 29 1.3.2 Conversion between Base A and Base B When B = Ak 32 1.4 Signed Number Representation 33 1.4.1 Sign Magnitude Numbers 33 1.4.2 Complementary Number Systems 35 1.5 Digital Codes 45 1.5.1 Numeric Codes 46 1.5.2 Character and Other Codes 50 1.5.3 Error Detection and Correction Codes 53 1.6 Summary and Review Questions 58 1.7 Collaboration Activities 58 Problems 59 2 Logic Circuits and Boolean Algebra 61 Learning Objectives 61 2.1 Logic Gates and Logic Circuits 61 2.1.1 Truth Tables 61 2.1.2 Basic Logic Gates 62 2.1.3 Combinational Logic Circuits 65 2.1.4 Sequential Logic Circuits 68 2.2 Hardware Description Languages (HDLs) 69 2.2.1 Verilog 69 2.2.2 VHDL 70 2.3 Boolean Algebra 72 2.3.1 Postulates and Fundamental Theorems 72 2.3.2 Boolean (Logic) Functions and Equations 77 2.3.3 Minterms, Maxterms, and Canonical Forms 78 2.3.4 Incompletely Specified Functions (Don’t Cares) 81 2.4 Minimization of Logic Expressions 82 2.4.1 Minimization Goals and Methods 82 2.4.2 Karnaugh Maps (K-Maps) 84 2.4.3 Minimization of Logic Expressions Using K-Maps 91 2.4.4 Quine–McCluskey Method 106 2.5 Summary and Review Questions 111 2.6 Collaboration Activities 112 Problems 113 3 Combinational Logic Circuit Design and Analysis 123 Learning Objectives 123 3.1 Design of Combinational Logic Circuits 123 3.1.1 AND–OR and NAND–NAND Circuits 124 3.1.2 OR–AND and NOR–NOR Circuits 125 3.1.3 Two-Level Circuits 126 3.1.4 Multilevel Circuits and Factoring 128 3.1.5 EXCLUSIVE-OR (XOR) Circuits 131 3.2 Analysis of Combinational Circuits 134 3.2.1 Boolean Algebra 134 3.2.2 Truth Tables 136 3.2.3 Timing Diagrams 137 3.2.4 Positive and Negative Logic 142 3.3 Design Using Higher-Level Devices 143 3.3.1 Decoders 143 3.3.2 Encoders 155 3.3.3 Multiplexers and Demultiplexers 159 3.3.4 Arithmetic Circuits 169 3.4 Summative Design Examples 182 3.4.1 Design Flow 182 3.4.2 Bank Security-Lock Controller 182 3.4.3 Seven-Segment Display Decoder 186 3.4.4 Four-Function Arithmetic Logic Unit (add, subtract, AND, XOR) 192 3.4.5 Binary Array Multiplier 196 3.5 Summary and Review Questions 200 3.6 Collaboration Activities 201 Problems 202 4 Introduction to Sequential Circuits 213 Learning Objectives 213 4.1 Models and Classes of Sequential Circuits 214 4.1.1 Finite-State Machines 214 4.1.2 State Diagrams and State Tables 216 4.1.3 Algorithmic State Machines 219 4.2 Memory Devices 221 4.2.1 Latches 222 4.2.2 Flip-Flops 234 4.2.3 Latch and Flip-Flop Summary 244 4.3 Registers 244 4.4 Shift Registers 248 4.5 Counters 253 4.5.1 Synchronous Binary Counters 254 4.5.2 Asynchronous Binary Counters 257 4.5.3 Modulo-N Counters 258 4.5.4 Ring and Twisted-Ring Counters 263 4.6 Summative Design Examples 272 4.6.1 Register File 272 4.6.2 Multiphase Clock 273 4.6.3 Digital Timer 275 4.6.4 Programmable Baud Rate Generator 278 4.7 Summary and Review Questions 281 References 281 4.8 Collaboration Activities 282 Problems 283 5 Synchronous Sequential Logic Circuit Analysis and Design 291 Learning Objectives 291 5.1 Analysis of Sequential Circuits 291 5.1.1 Circ |